On the Development of a Hardware Library for Embedded Image Processing Systems Based on Reassemble Functional Blocks

Takanori Kurihara, Yamin Li


With rapidly increased demands for machine vision, many image processing circuits for embedded systems have been developed recently. However, the implementation and verification of new algorithm circuits require many tasks such as the interface design and the timing adjustment. This paper aims to simplify these tasks by implementing a hardware library for image processing. The library contains bus and device interfaces and basic image processing function modules. These modules have a simple interface and can be easily reassembled like building blocks. It means that it is possible to configure various algorithmic blocks by combining existing blocks. In the latter part of the paper, we show how to construct a sample system by using the hardware library and compare the system performance with the software implementation. The sample implements a corner detection system based on the Harris algorithm. The implemented system is 64.63 times faster than the software implementation with the OpenCV library running on an ARM CPU. In the future, we will expand and enhance our library to respond to various image processing algorithms.


image processing; hardware library

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